Do you want to apply your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Come to Apple and work within a dynamic team to deliver innovative technologies to our customers. This is an excellent opportunity to engage in groundbreaking display technologies and add to the development of new Apple SoCs and products year after year.

SoC Display Subsystem Validation Engineering Program Manager (EPM) is a system integration role within the Hardware Technologies Team, that will lead the strategic planning and execution of end to end validation of the SoCs display subsystem. The subsystem is comprised of: display pixel pipeline in the SoC, the display module and driver IC, as well as the FW/SW to enable the display features at the system level. This EPM will be responsible for pulling together an architecture guided highly multi-functional feature enablement, de-risk and validation plan at both SoC and System level (running OS), and tuning to optimize display image quality. The EPM will also drive cross-functional debugs, and critical de-risk plans to minimize risk of late SoC revisions in enabling pioneering display technologies across all Apple product lines.

This high profile role will be responsible for the following:

– Work with multi-functional teams to ensure end-to-end validation plan and de-risk strategy of the SoC display subsystem is established early in the SoC Concept phase.
– Collaborate with systems, software, module and SoC integration teams to plan and track “Golden C-model” development and validation, early software driver development, SoC pre/post-silicon validation, and image quality evaluation.
– Debug technical silicon and system issues and drive them to closure by bringing together key partners.
– Collaborate and facilitate communication across multi-functional engineering teams and their management.
– Clear and focused communication of program risks and status, including issue reporting and tracking.
– This is a highly visible role that requires the ability to understand and extract action plans from complex technical discussions and translate into succinct messaging for multi-functional and executive status reporting.

BS + 3 years of relevant experience.Proven experience in SoC pre-/post-silicon or platform level validation.