Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there’s no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!

Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer, floating-point, and/or load/store execution for our performant cores.

As a CPU Microarchitect/RTL Engineer, you will own or participate in the following:

• Microarchitecture development and specification – from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
• RTL ownership – development, assessment and refinement of RTL design to target power, performance, area and timing goals
• Validation – support test bench development and simulation for functional and performance verification
• Performance exploration and correlation – explore high performance strategies and validate that the RTL design meets targeted performance
• Design delivery – work with multifunctional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power

Minimum BS and 10+ years of relevant industry experienceKnowledge of microprocessor architectureKnowledge of Verilog and/or VHDLExperience with simulators and waveform debugging toolsKnowledge of logic design principles along with timing and power implications