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Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.

As an Apple soft-IP CPU Implementation Feasibility Engineer, you will be working for RTL feasibility, PD feasibility including tech/CAD work and PD methodology work. You will be responsible to provide technical guidance to FE/BE design of other. IPs Responsibilities also include but are not limited to:

•Making area/frequency/performance/power trade-offs and
•Driving RTL-to-GDS flow through synthesis/place-and-route with ambitious goals for power, performance, and area
•Working with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, power, testability, and reliability
•Performing different floorplanning experiments to understand the microarchitectural feasibility for achieving high targets for performance, power and area
•Performing different feasibility experiments for RTL innovations and improvements that drive the next generation high performance chips
•Working on PD methodology customized for CPU architecture
•Driving discussion with FE/BE designers in other IPs

Minimum BS and 10+ years of relevant industry experienceDeep knowledge of CPU microarchitecture including common critical loops for timing and understanding of low power microarchitecture and implementation techniques for CPUsUnderstanding of static timing and critical path closure techniquesDeep understanding of power, performance and area tradeoffsExperience with Power analysis tools