Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.

As a member of our CAD team, you will architect, develop, maintain and improve physical design verification (PDV) flows. The role requires you to work on flow and runset development for various technology nodes and tool sets. Working alongside the CAD team, you will be collaborating with the custom digital/analog/mixed-signal design, physical design (PD) and chip integration teams. With good understanding of design rule checks (DRC) and layout versus schematic (LVS) runsets, you will develop rule decks from scratch and/or modify existing ones.

#NAME?

Previous industry experience in Silicon chip design flowsTapeout support and IP/SOC level PDV debug experience in various technology nodesScripting skills in programming languages such as Python, Perl, Tcl, Shell, Makefile or CExperience with flow automation and development in advanced nodesMinimum requirement of BS and 10+ years of relevant industry experience