CPU Performance Architect – Platform Architecture – 200561943 -Beaverton, Oregon, United States

Apple

Do you have an uncommon desire to seek out and solve exceedingly difficult challenges rather than the easy ones? Do you believe that truly valuable and meaningful accomplishments are the result of pushing the limits of perseverance? Do you believe that a world-class team with relentless drive can surpass even their own high expectations? We do! But we also realize this job isn’t for everyone. What we do isn’t easy, but you don’t take the easy path. We are seeking a highly motivated, innovative, and confident individual to join the CPU Architecture and Performance Team; we are a group that is driving advanced exploration for next generation iPhone, iPad, and Mac CPU architectures.

As a CPU Performance Architect with a focus on CPU micro-architecture, you will be part of a team that is pushing the boundaries of innovation in the areas of branch prediction, code/data prefetchers, novel prediction schemes to improve latency and optimization of CPU pipelines. With others, you will seek out areas for improvement while collecting data and measurements that either confirm the idea or rule it out. You will collaborate with experienced CPU designers in micro-architecture and RTL to assess the feasibility of ideas through modeling and refine those ideas to make them implementable. The role requires the analysis of specific single-threaded and multi-threaded workloads across existing and new product categories to identify bottlenecks and opportunities for improvement. We collaborate as a larger CPU architecture and performance team to maintain and improve the simulation environment to enable data driven decisions and look for ways to boost the productivity of the entire team.

Minimum requirement of a BS degreeKnowledge of CPU architecture and micro-architectureAbility to combine micro-architecture knowledge and performance bottleneck analysis on relevant workloads to conceive novel performance ideasExperience working with design and implementation teams to iterate on ideas to solve timing and power efficiency challenges and fit them into system constraintsFamiliarity with performance and/or power simulation environments and ability to take ideas from concept to C/C++ simulator implementation.Experience in scripting languages such as Perl or Python

 

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