Are you an engineer looking to take on larger responsibilities while keeping a keen eye on the details? Do you enjoy working cross-functionally to solve multi-disciplinary problems end to end? Join our team of highly motivated, high caliber, detail-oriented problem solvers.

As an ASIC Design Engineer, your primary responsibilities will include chip architecture definition, block/function definition, specification, RTL design and simulation of digital functions on complex ASICs for next generation Apple products.

• Work with system and architecture teams to define chip requirements
• Define top level chip architecture and develop detailed uArch specifications for digital block functions
• Implement the functions in Verilog RTL to specification
• Utilize state of the art low power design techniques to achieve aggressive power targets
• Support the DV team in verification closure for achieving first pass silicon
• Perform all design integration activities like Lint, CDC, RDC, Synthesis & ECO
• Work with Physical Design Team on resolving STA, physical, power and logical issues
• Collaborate with internal and cross-functional Firmware, Si validation and System stakeholders

BS + 10 years of relevant experienceProven track-record in ASIC design including arch definition, uarch development and Verilog RTL design experienceKnowledge of best practices with respect to implementation of digital logicExperience in Low Power design methodologyExperience with multiple clock domains and asynchronous interfacesPower user of industry standard design tools and flows for logic synthesis, timing constraints, timing closure, STA, equivalence checking and other front-end toolsFlow automation scripts using Perl/Python, Tcl, or shell scripts