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In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology.

• Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.
• Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals.
• Timing, physical and electrical verification, and driving the signoff closure for the partitions.
• Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution.
• Drive optimization of PnR partitions, to achieve best Power/Performance/Area.

Minimum BS and 10+ years of relevant industry experience.Knowledge in partition level P&R implementation including floorplanning, clock and power distribution, timing closure, physical and electrical verification.Knowledge of physical design construction and analysis flows and methodology.Experience with industry standard tools, understanding their capabilities and underlying algorithms.Experience with typical SOC issues such as multiple voltage and clock domains and mixed signal block integration.