Would you like to join Apple’s growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient / low power design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team. In this highly visible role, you will be at the center of low power logic design efforts with a critical impact on getting functional products to hundreds of millions of customers quickly. Will you join us and do the best work of your life here?

In this role, you will be responsible for designing power management logic for complex wireless communication SoCs, including:
• Define SoC power management features to meet product requirements.
• Implement power management logic.
• Work with XF teams to verify power management logic.
• Support Power team on power analysis and post-silicon correlation efforts.
• Post silicon bring up and debug support.

BS and 10+ years of relevant experience.Proved track record in power / clock / reset management logic design.Proficiency in Verilog language.Power management logic verification and debug experience.Understand ASIC low power design techniquesKnowledge of CDC, RDC, STA and UPF.Power tool, e.g. PTPX and Power Artist knowledge and experience.Proficiency in scripting languages (Shell, Perl or Python).Basic knowledge on common SOC components, e.g. CPU, fabric, peripherals and PCIe.Strong problem solving and analytical skills.