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In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with constructing and modify timing flows, timing analysis, and timing closure.

As a CPU Design Timing Engineer, you will be responsible for the timing closure of the project. Responsibilities include but are not limited to:

• Working with the CAD team to develop the timing flow that will be used on the project including scripting to improve analysis flows and engineer efficiency
• Working extensively with CPU micro-architects and implementation engineers to drive timing closure for the CPU

Minimum BS and 3+ years of relevant industry experienceSTA/physical design knowledge of device physicsExperience with cross talk, noise, OCV or uncertaintyKnowledge of static timing tools and flows