What to Expect

The candidate will focus on developing Post-Silicon validation plan, debug tools, and infrastructure for Tesla’s custom SoCs and Platforms designs for Autopilot and AI. As a Senior member in Silicon and Systems validation team, the candidate will interface with many different cross functional teams as well as external vendors/partners to create detailed bringup and validation test plans for the IPs within the SOC like CPU, GPU, NOC, Memory, ISP, PCIe etc., and apply the plan in emulation, post-silicon, and platform use cases. In addition, the candidate will be tuning the High-Speed IOs for optimal electrical and functional performance, perform system level power characterization/reduction, and troubleshoot complex hardware bugs and field returns. The candidate will regularly take part in hardware design and schematics review, firmware development, and building automated test infrastructures for running large volume of post silicon system level tests. 

The ideal candidate will need to have a deep understanding of Silicon Architecture, especially around different blocks in SoC like compute blocks, caches, interconnects, clock, power, reset, interrupts, MMUs, different power management schemes, and interaction with board level components like DRAM, PCIe, Ethernet etc.

What You’ll Do

Experience in design/debug of ARM or x86 System on Chip Architectures 
Experience leading many aspects of Silicon and Platform validation from design phase to production
Experience collaborating with IP vendors and Foundry Services for SOC design, development, and production
Experience collaborating with cross functional teams like SW, EE, Mechanical, Thermal, Reliability, Manufacturing, Supply Chain and FAE
Experience with JTAG, GDB and assembly code debug
Experience with Statistical Data Analysis and Design of Experiments
Experience with Electrical Testing and Protocol Analyzer equipment
Familiar with Linux OS and Scripting
What You’ll Bring
Bachelors Degree in Electrical Engineering, Computer Science Engineering, or equivalent major with 10+ years of relevant work experience or equivalent experience 
Experience in debug/bringup of one or more of high speed interfaces (DDR, PCIe, CSI, UFS, etc.)
Experience in Programming in C/C++ or Python
Familiar with Schematics and PCB design

Palo Alto, California

Full time